? semiconductor components industries, llc, 2006 october, 2006 ? rev. 3 1 publication order number: ncp112/d ncp112 supervisory ic for desktop power supply monitoring the ncp112 is a highly integrated supervisory circuit that incorporates all the functions necessary for monitoring and controlling a multi ? output switch ? mode power supply system. the ncp112 provides an ability to monitor the status of the power supply outputs and communicate it to the system controller. the programmable output delays protect against spurious fault indicators. features ? under and overvoltage protection for 3.3 v, 5.0 v and 12 v outputs ? additional adjustable overvoltage protection input ? built ? in hysteresis on all input pins ? programmable undervoltage blanking during power ? up ? fault output with 20 ma sink capability ? programmable remote on/off delay time ? programmable power good delay time ? precision voltage reference with 20 ma source capability ? optimized for low ? cost 100 nf capacitors ? enhanced replacement to the tsm112 ? pb ? free packages are available typical applications ? personal computer switch mode power supply monitoring ? multi ? output power supplies requiring system supervision http://onsemi.com pdip ? 14 p suffix case 646 soic ? 14 d suffix case 751a pin connections vs33 vs5 vs12 adj pgi ctuv gnd ctremote remote vref ctpg pgo fault vcc pdip ? 14, soic ? 14 marking diagrams see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information NCP112P awlyywwg 1 14 1 ncp112dg awlyww 1 14 1 a = assembly location wl = wafer lot y, yy = year ww = work week g = pb ? free package
ncp112 http://onsemi.com 2 pin function description pin no. symbol function description 1 vs33 3.3 v sense input over/undervoltage sense input for 3.3 v. 2 vs5 5.0 v sense input over/undervoltage sense input for 5.0 v. 3 vs12 12 v sense input over/undervoltage sense input for 12 v. 4 adj adjustable ovp input may be used for an additional overvoltage protection signal. 5 pgi power good input power good input signal. 6 ctuv adjust able timing cap acitor adjustable undervoltage blanking delay during power ? up. 7 gnd ground ground 8 vref voltage reference precision 2.5 v reference output. 9 remote remote on /off input input remote control from the microcontroller . acts as a reset signal after a fault condition. 10 ctremote adjustable remote on/off capacitor adjustable remote delay. 11 ctpg adjustable power good capacitor adjustable power good delay. 12 pgo power good output power good output. active high when no fault conditions are present. 13 fault fault output detects over/undervoltage conditions. active high during a fault condition. 14 vcc power supply voltage power supply voltage.
ncp112 http://onsemi.com 3 figure 1. block diagram vs33 1 vs5 2 vs12 3 v ref uv detector 2.5 v reference vref 8 ? + 1.28 v adj 4 gnd 7 ov fault delay uv blanking delay at power up v cc ctremote ov detector set sq clr rq 13 fault remote on/off delay 10 ? + 1.28 v 9 remote v cc 3.4 v ? + 1.28 v 9 pgi 5 power good delay 5 12 pgo ctuv 6 ctpg 11 v cc 14 v cc
ncp112 http://onsemi.com 4 maximum ratings rating symbol value unit power supply v oltage (note 1) v cc 18 v power good output current i pgo 30 ma fault output current i fault 30 ma voltage reference output current i ref 20 ma voltage rating (pins 4, 5, 6, 9, 10, 11) adj, pgi, ctuv, remote, ctremote, ctpg v cc v voltage rating (pins 12, 13) pgo, fault 18 v power dissipation and thermal characteristics (pdip ? 14) thermal resistance, junction ? to ? air thermal resistance, junction ? to ? case maximum power dissipation @ 25 c r ja r jc p d 100 45 1.25 c/w c/w w power dissipation and thermal characteristics (soic ? 14) thermal resistance, junction ? to ? air thermal resistance, junction ? to ? case maximum power dissipation @ 25 c r ja r jc p d 125 30 1.0 c/w c/w w operating junction temperature t j +150 c operating ambient t emperature t a ? 40 to +125 c storage temperature range t stg ? 55 to +150 c electrical characteristics (v cc = 5.0 v, t a = 25 c for typical values and t a = 0 c to 85 c for min and max values, unless otherwise noted.) characteristic symbol min typ max unit operating conditions dc power supply v cc 4.5 ? 16 v power supply current i cc ? 3.0 5.0 ma overvoltage/under voltage protection overvoltage protection 3.3 v output sense hysteresis* 5.0 v output sense hysteresis* 12 v output sense hysteresis* vov33 vov hys33 vov5 vov hys5 vov12 vov hys12 3.8 ? 5.8 ? 13.4 ? 4.0 40 6.1 60 14.2 130 4.2 ? 6.4 ? 15 ? v mv v mv v mv undervoltage protection 3.3 v output sense hysteresis* 5.0 v output sense hysteresis* 12 v output sense hysteresis* vuv33 vuv hys33 vuv5 vuv hys5 vuv12 vuv hys12 2.3 ? 3.7 ? 9.2 ? 2.5 100 4.0 100 10 100 2.7 ? 4.3 ? 10.8 ? v mv v mv v mv *hysteresis is measured in direction from threshold point back to nominal value of input voltage (i.e. 3.3 v, 5.0 v or 12 v). 1. this device contains esd protection and exceeds the following tests: human body model jesd 22 ? a114 ? b: 2.0 kv machine model jesd 22 ? a115 ? a: 200 v
ncp112 http://onsemi.com 5 electrical characteristics (continued) (v cc = 5.0 v, t a = 25 c for typical values and t a = 0 c to 85 c for min and max values, unless otherwise noted.) characteristic symbol min typ max unit overvoltage/undervol tage protection (continued) undervoltage protection (continued) adjustable overvoltage protection threshold hysteresis v adjth v adjth ? ? 1.28 100 ? ? v mv undervoltage blanking during power up undervoltage blanking time (c tuv = 100 nf) t uv 100 300 500 ms undervoltage blanking threshold voltage (pin 6) t uvth ? 2.5 ? v power good power good input threshold v oltage power good input hysteresis v pgith v pgihys ? ? 1.28 25 ? ? v mv low state open collector saturation v oltage (i = 20 ma) v lsat ? ? 0.4 v high state open collector leakage current (v = 5.0 v) i hleak ? ? 1.0 a power good transient (see application note section) rise time fall time t pgraise t pgfall ? ? 1.0 1.0 ? ? s adjustable delay time (c tpg = 100 nf) t pg 100 300 500 ms power good threshold voltage (pin 11) t pgth ? 2.5 ? v fault fault sink current i fault 20 ? ? ma fault saturation voltage (i = 20 ma) v faultsat ? ? 0.4 v fault leakage current (v = 5.0 v) i faultleak ? ? 1.0 a fault delay time before latching t fault ? 100 ? s remote control remote input voltage threshold remote hysteresis v rth v rhys ? ? 1.28 25 ? ? v mv remote pin internal pull ? up voltage v rh 3.3 3.4 3.6 v remote low state saturation current i rl ? ? 0.5 ma remote time delay (c tremote = 100 nf) remote on remote off t remon t remoff 35 35 45 45 60 60 ms remote delay threshold voltage (pin 10) low level high level t remth lo t remth hi ? ? 0.2 2.3 ? ? v voltage reference internal voltage reference (i o = 1.0 ma) @ 25 c internal voltage reference (i o = 1.0 ma) 0 c to 85 c v ref v ref 2.46 2.42 2.50 2.50 2.54 2.58 v line regulation (4.5 v < v cc < 16 v) iout = 0 ma iout = 10 ma v refline v refline ? ? 4.0 15 10 ? mv load regulation (v cc = 5.0 v) 0 ma < iout < 10 ma v refload ? 25 ? mv
ncp112 http://onsemi.com 6 figure 2. timing diagram 3.3 v, 5 v, 12 v pgo pgi fault remote v cc tremote (on) tpg tremote (off) ovp tfault (ov) uvp table 1. function table pgi remote adj undervoltage overvoltage fault pgo <1.28 v (l) l <1.28 v (l) no no h l <1.28 v (l) l <1.28 v (l) no yes h l <1.28 v (l) l <1.28 v (l) yes no h l <1.28 v (l) l >1.28 v (h) no no l l <1.28 v (l) l >1.28 v (h) no yes h l <1.28 v (l) l >1.28 v (h) yes no h l >1.28 v (h) l <1.28 v (l) no no h l >1.28 v (h) l <1.28 v (l) no yes h l >1.28 v (h) l <1.28 v (l) yes no h l >1.28 v (h) l >1.28 v (h) no no l h >1.28 v (h) l >1.28 v (h) no yes h l >1.28 v (h) l >1.28 v (h) yes no h l x h x x x h l 2. x = > don?t care. 3. fault = l means main pwm is enable. 4. pgo = h means power supply is working within atx specifications.
ncp112 http://onsemi.com 7 figure 3. simplified application schematic primary rectifier main converter pwm + opto + v ref auxiliary converter pwm + opto + v ref 12 v 5 v 3.3 v v cc 5 v stby 12 v 5 v 3.3 v 5 v stby ? over and undervoltage protection ? reference ? logic ? sequencer ncp112 fault pg rem
ncp112 http://onsemi.com 8 pin function description main line sensing ? vs33, vs5 and vs12 these pins are used to monitor the main power outputs. the internal circuitry of the ncp112 provides over and undervoltage detection and indicates an error state. the over and undervoltage levels meet the atx specification. in order to avoid unexpected oscillation of the device, the ncp112 features both over and undervoltage hysteresis. the overvoltage detection circuitry incorporates a fault delay, which helps to filter short positive voltage spikes below 100 s. to avoid triggering a false undervoltage signal during power ? up, a timing capacitor (ctuv) may be used to introduce a user defined blanking delay. additional overvoltage protection ? adj this pin can be used as another user ? defined monitoring input and has a hysteresis feature similar to vs33, vs5 and vs12. when the input voltage is below the threshold level of 1.28 v, a fault condition is asserted. note that the adj pin is logically ored with the overvoltage detector output, thus there is a 100 s fault delay. power good input ? pgi the power good input (pgi) can be used to monitor an additional logic event, for example, the temperature inside an atx power supply unit. when the input voltage at the pgi input is below the threshold level of 1.28 v, the power good output (pgo) signal remains in a low state, even if all three sense inputs are within voltage limits. the pgi signal, along with the remote, and the over and undervoltage singles encounter a power good delay circuit as depicted in figure 1. timing capacitors ? ctuv, ctremote, ctpg the ncp112 timing circuitry is optimized for utilizing low cost, 100 nf ceramic capacitors. the time delays of ctuv, ctremote, and ctpg can be adjusted by simply changing external capacitor values. the time delay is a linear function of the capacitance because the ncp112 uses internal current sources for charging and/or discharging capacitors. remote control ? remote a reset signal can be realized with the remote pin. when the remote pin is in the active low state, the external link (the fault signal) between the ncp112 and the pulse width modulator (pwm) generator of the external power supply is enabled (figure 3). in order to effectively reset the latch, a minimum width remote pulse should be applied. the width of this pulse should be greater than t rem , which is determined by adding an external capacitor (ctremote). note that the remote pin is internally pulled up to 3.4 v. power good output ? pgo the purpose of the pgo function is to warn the motherboard that the voltage of at least one of the three main power lines is out of range, independent of the adj input. please refer to table 1 for a functional truth table. the pgo is subject to a delay t pg , which can be adjusted with an external capacitor (ctpg). the power good output pin is capable of sinking 20 ma of current. fault output ? fault in a typical application such as figure 3, the fault pin (fault), is activated when any one of the three main power lines (3.3 v, 5.0 v, 12 v) is out of range or the adj pin is below 1.28 v. this is independent of the pgi input. the fault output is the external link between the ncp112 and the primary pwm. in the event of a short circuit condition, the overvoltage circuitry provides an additional delay time t fault which provides adequate protection. voltage reference ? vref the vref is a 2.5v precision reference output, with current sourcing capability of 20 ma. no bypass capacitor or minimum output current is required to maintain stability. ordering information device package shipping ? NCP112P pdip ? 14 25 units / rail NCP112Pg pdip ? 14 (pb ? free) ncp112d soic ? 14 55 units / rail ncp112dg soic ? 14 (pb ? free) ncp112dr2 soic ? 14 2500 / tape & reel ncp112dr2g soic ? 14 (pb ? free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d.
ncp112 http://onsemi.com 9 package dimensions pdip ? 14 case 646 ? 06 issue p 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 19.56 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m ??? 10 ??? 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n ? t ? 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87
ncp112 http://onsemi.com 10 package dimensions soic ? 14 case 751a ? 03 issue h notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ? a ? ? b ? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ? t ? f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 7.04 14x 0.58 14x 1.52 1.27 dimensions: millimeters 1 pitch soldering footprint* 7x *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different a pplications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical e xperts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc prod uct could create a s ituation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was neglig ent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncp112/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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